In a control circuit that employs a microcomputer (hereinafter, called a microcomputer) for example, a configuration is generally employed in which a watchdog pulse is periodically output from the microcomputer, the output state of the watchdog pulse is monitored by a monitoring circuit, and a reset signal is supplied by the monitoring circuit to the microcomputer if it is determined that the operation of the microcomputer is abnormal.
It is often the case that immediately after the microcomputer has been reset, the level of the output signal output to a load whose on/off state is controlled by the microcomputer is fixed to H (High) or L (Low). Here, for example, in the case of a load that falls into an undesirable state if the control circuit malfunctions and the load is fixedly controlled so as to be only either off or on, such as a headlight or horn installed in a vehicle, the control circuit is equipped with a backup function so that the control performed by the microcomputer can be turned on/off with a different system according to an external instruction that is based on a user operation (see JP 2009-261153A).
FIG. 9 is a circuit diagram showing the configuration of a conventional backup system according to JP 2009-261153A. For example, one end of a combination switch 81 arranged in the console portion of the driver's seat or the like is connected to the input terminal of a microcomputer 73 included in an ECU 7 in the engine room, via a microcomputer 83 of an in-compartment ECU 82 and one input terminal and the output terminal of an OR gate 71, and is also connected to the other input terminal of the OR gate 71 and one input terminal of an AND gate 72. One output terminal of the microcomputer 73 is connected to a semiconductor device 76 via one input terminal and the output terminal of an OR gate 75, and the other output terminal, which outputs a watchdog pulse, is connected to the input terminal of a watchdog circuit 74. The output terminal of the watchdog circuit 74 is connected to the other input terminal of the AND gate 72, and outputs an L-level signal when the microcomputer 73 is in the normal state. The output terminal of the AND gate 72 is connected to the other input terminal of the OR gate 75. An in-vehicle power supply 84 is connected to the power supply terminal of the semiconductor device 76, and a load 85 is connected to the output terminal. In general, the microcomputer 73 is predominantly a microcomputer driven with 5 V, and the microcomputer 73, the watchdog circuit 74, and peripheral gate circuitry receive a supply of power from a power supply IC that generates a 5V voltage by stepping down the voltage of a battery (not shown).
In FIG. 9, if the combination switch 81 is turned on while an abnormality has not be detected in the microcomputer 73, the semiconductor device 76 turns on according to a signal from one output terminal of the microcomputer 73, and the load 85 is turned on. On the other hand, if the microcomputer 73 falls into an abnormal state and a watchdog pulse is no longer output from the other output terminal, the watchdog circuit 74 supplies an H-level signal to the other input terminal of the AND gate 72, and therefore the signal from the combination switch 81 is supplied to the other input terminal of the OR gate 75 via the AND gate 72 included in a backup line 70. For this reason, even if the microcomputer 73 loses the ability to control the semiconductor device 76, the turning on/off of the load 85 can be controlled by turning the combination switch 81 on/off.